API for direct JTAG access?

Use USB JTAG NT for development. GNU deugger etc.
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paxlin
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Joined: Wed Jun 23, 2010 8:57 am

API for direct JTAG access?

Post by paxlin »

Hi,

I am wondering if API can be provided for integrating JTAG access into custom software? We're trying to use this device to access the tap controller on our chip.

Thanks.
usbbdm
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Joined: Mon Jul 18, 2005 9:33 pm

Post by usbbdm »

paxlin wrote:Hi,

I am wondering if API can be provided for integrating JTAG access into custom software? We're trying to use this device to access the tap controller on our chip.

Thanks.
Which controller? The JTAG tap code is very complicated. It is highly optimized and almost non-portable. Believe me I have squeeze each clock to make it fast. If you have special need and your device can handle higher clock (24M), we can provide customized software to do so.
paxlin
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Joined: Wed Jun 23, 2010 8:57 am

Post by paxlin »

This is a custom jtag controller, so I am just looking for the low level jtag access codes. Will this work with UrJtag code? And is your device using the USB JTAG Adapter Firmware?

Thanks!
usbbdm
Junior Member
Posts: 8979
Joined: Mon Jul 18, 2005 9:33 pm

Post by usbbdm »

paxlin wrote:This is a custom jtag controller, so I am just looking for the low level jtag access codes. Will this work with UrJtag code? And is your device using the USB JTAG Adapter Firmware?

Thanks!
No. This will not work with UrJtag. This is completely different design. Some of the tap control is done in hardware and some in the software. The combo was optimized for MIPS JTAG. (IR length < 8, most 32 bit scan).

If your special target has different requirement it is possible to optimized for that. Like if we decide only to SPI we could have 6MB/s read speed. Simply use 48MHz clock and use full Cypress chip. If we select higher clock we can get the max read speed that the chip provide.
paxlin
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Joined: Wed Jun 23, 2010 8:57 am

Post by paxlin »

usbbdm wrote:No. This will not work with UrJtag. This is completely different design. Some of the tap control is done in hardware and some in the software. The combo was optimized for MIPS JTAG. (IR length < 8, most 32 bit scan).

If your special target has different requirement it is possible to optimized for that. Like if we decide only to SPI we could have 6MB/s read speed. Simply use 48MHz clock and use full Cypress chip. If we select higher clock we can get the max read speed that the chip provide.
I just checked the tap controller in our design, and looks like it's IR length of 8, and 32 bit scans. Would it be possible to give us the functions you use to access the jtag? We don't need high transfer rate, as we just need it to control read and write of control registers through the tap controller.
usbbdm
Junior Member
Posts: 8979
Joined: Mon Jul 18, 2005 9:33 pm

Post by usbbdm »

paxlin wrote:I just checked the tap controller in our design, and looks like it's IR length of 8, and 32 bit scans. Would it be possible to give us the functions you use to access the jtag? We don't need high transfer rate, as we just need it to control read and write of control registers through the tap controller.
If you just need slow tap controller there are tons of open source code.
The tap control for each target is carefully re-written. Like DCU and MIPS uses different control code.
Also it is all in assembly written for the CPLD. There is not a lot of use for other project.

USB JTAG NT is close project. Not meant for open source.
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